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International Journal for Research Trends and Innovation
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ISSN Approved Journal No: 2456-3315 | Impact factor: 8.14 | ESTD Year: 2016
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Issue: March 2026
Volume 11 | Issue 3
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Impact Factor : 8.14
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| Paper Title: | Novel AXI Interconnect-based Network on Chip in SoC Devices for High Throughput |
| Authors Name: | SHOBAN MUDE , Jagan Sapavat |
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| Author Reg. ID: |
IJRTI_200688
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| Published Paper Id: | IJRTI2503058 |
| Published In: | Volume 10 Issue 3, March-2025 |
| DOI: | |
| Abstract: | The increasing complexity of modern System-on-Chip (SoC) devices are efficient interconnect to handle high data throughput, low latency, and scalability demands. Traditional bus-based architectures often face limitations in bandwidth, latency, and power efficiency as the number of cores and peripherals increases. This paper introduces a novel AXI Interconnect-based Network-on-Chip (NoC) architecture tailored for advanced SoC design. The proposed architecture integrates the widely adopted AMBA AXI protocol with a scalable NoC topology, enabling efficient communication among heterogeneous processing units, memory subsystems, and specialized accelerators. By leveraging dynamic routing algorithms, parallelism in data transfers, and optimized burst handling, the design achieves significant improvements in throughput and latency. The reduction in communication latency by up to 25% and throughput increase of 30% compared to traditional AXI-based bus architecture. The NoC’s module design enhances scalability, supporting up to 128 cores with minimal performance degradation. Energy efficiency is another critical advantage, achieved through reduced and optimized packet routing. The proposed architecture is evaluated under diverse workloads, including AI/ML, multimedia processing, and real-time automotive applications, proving its versatility and robustness. This work highlights the potential of AXI Interconnect-based NoC architecture in shaping the future of SoC design. |
| Keywords: | Network on chip, System on chip, AXI, UART, Throughput and Latency. |
| Cite Article: | "Novel AXI Interconnect-based Network on Chip in SoC Devices for High Throughput ", International Journal for Research Trends and Innovation (www.ijrti.org), ISSN:2455-2631, Vol.10, Issue 3, page no.a445-a451, March-2025, Available :http://www.ijrti.org/papers/IJRTI2503058.pdf |
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2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016 An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator |
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Published Paper ID: IJRTI2503058
Registration ID:200688
Published In: Volume 10 Issue 3, March-2025
DOI (Digital Object Identifier):
Page No: a445-a451 Country: Hyderabad, Telangana, India Research Area: Electronics & Communication Engg. Publisher : IJ Publication Published Paper URL : https://www.ijrti.org/viewpaperforall?paper=IJRTI2503058 Published Paper PDF: https://www.ijrti.org/papers/IJRTI2503058 |
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ISSN: 2456-3315
Impact Factor: 8.14 and ISSN APPROVED,
Journal Starting Year (ESTD) : 2016
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